Nanomaterials: Graphene rests easy.

699 news & views etching of large sheets represents an attractive alternative because it is able to achieve uniform, organized arrays 7. Unfortunately, the complexity of the tools necessary for sub-10-nm patterning and an inability to control edge roughness represent significant limitations to this technique. Sprinkle, de Heer and colleagues report progress towards a very different approach, in which ribbons are grown directly into the desired layout and with a controlled width 2. Their methods build on techniques that they pioneered, wherein thermal decomposition of silicon-terminated SiC wafers yields uniform sheets of graphene 8. This team now incorporates two new steps that exploit subtle aspects of the crystalline SiC substrates. First, they etch shallow trenches into the surface of a SiC wafer along a particular crystal axis. On thermal annealing, the vertical sidewall edges of these trenches reconstruct into smooth facets, angled at ~25° above the substrate surface. The key feature of this transformation is that the depth of the trench determines the width of its facets: for example, trench depths of 20 nm yield facet widths of 40 nm. This converts the difficult problem of sub-50-nm lithography into the comparatively easy task of controlling etch depth. The next step exploits the fact that graphene grows at different rates on different crystal faces of SiC. By orientating their trenches in an appropriate direction, Sprinkle and colleagues create facets that form graphene more quickly than surrounding regions do, possibly owing to different bonding of the silicon atoms. As a result, for short growth times, graphene forms predominantly on the facets. Combined with a fine control over facet width, this process allows the formation, in a single growth step, of organized arrays of graphene ribbons with widths that begin to approach those needed for applications in digital electronics, and with edges that are unaltered by etching processes. The research team use their new technique 2 to build an array of 10,000 transistors, arranged in practical circuit geometries. Although the measured field-effect mobility is in the same range as other published ribbon devices, it is less than a tenth of the best substrate-supported graphene-sheet devices. Also, the smallest achieved widths are still much too wide for practical use, giving on/off switching ratios that are too low by several orders of magnitude. Sprinkle and colleagues suggest that these shortcomings can be addressed by optimizing their technique. Future work in this direction looks very promising …